GDA-2A6S1 6 Channel IGBT Gate Driver Board

GDA-2A6S1 6 Channel IGBT Gate Driver Board

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Applications

  • 3 Phase R&D Inverters

  • Active PFC Rectifiers

  • Switched Mode Power Supplies

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Features

  • Short circuit protection with soft shutdown

  • Active miller and output UVLO protection

  • 707 Vdc working voltage with 3 KVac isolation

  • 250ns propagation delay, 50KV/us CMR

  • Configurable dead-time, PWM/Indep. inputs

  • Fault feedback and fault latch protection

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Specifications

ParameterValueUnitParameterValueUnit
Output Channels6Output Voltage15/0V
Peak Output Current2AAvg. Output Power per Channel600mW
Input to Output Isolation3000VacMax. Working Insulation Voltage707V
Max. Propagation Delay250nsMin. Common Mode Rejection (CMR)50kV/us
Operating Temperature-25 to +70°CActive Miller Clamp Current1.7A
Input ModesConfigurable PWM / DualDead-TimeUser Adjustable

* Note 1: All ratings are given at Vs=15V and 25°C ambient temperature unless otherwise specified.

 

FAQs

Selecting the right value of the external gate resistance is essential in limiting the noise and energy loses in the switching operation and it’s selection may vary depending on the transistor being used. The data sheet of the transistor IC shows recorded test values of operation under optimal condition which also includes the value of external gate resistance (RGATE) which enables switching while minimizing turn on (Eon) and turn off (EOFF) loses.

The optimal value of gate driver output voltage depends on the switch being used. Usually SiC FETs come in multiple recommended voltages such as +20/-5V, +18/0V and +15/-5V. You can find more information in Absolute Maximum Ratings table in switch datasheet.

SiC gate drivers have higher common mode rejection and low propagation delay as compared to IGBT gate drivers, making them suitable for higher speed applications while, at the same time, having all the advanced protection features.

Each output channel of the gate driver board has a male plug connector which can be directly connected to the gate-source/emitter terminal with the selected gate resistance to provide with the required gate voltage for the switching operation.

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